terms
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| Burst EDO BEDO | memory that is stored on 168-pim DIMM modules
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| CAS Latency column access strobe | a method of measuring access time to memory, which is the number of clock cycles required to write or read a column of data off a memory module
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| C-RIMM continuity rimm | a placeholder RIMM module that provides continuity so that every RIMM slot is filled.has no memory
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| DDR double data rate | a computer bus that transfers data on both the rising and falling edges of the clock signal[1]. This is also known as double pumped, dual-pumped, and double transition.
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| DDR2 | memory can send data on both the rising and falling edges of the processors clock cycles.
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| DDR3 | has the ability to transfer data at twice the rate,eight times the speed of its internal memory arrays,enabling higher bandwith or peak data rates
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| direct rambius DRAM | memory technology by rambus and intel that uses a narrow network type system bus
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| direct RDRAM |
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| Double Data Rate SDRAM | a type of memory technology used on DIMMS that runs at twice the speed of the system clock
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| DDR SDRAM II |
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| double sided | a dimm feature whereby memory chips are installed on both sides of a dimm
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| dual channels | a motherboard feature that improves memory performance by providing two 64 bit channels between memory and the chipset
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| dual ranked | double sided dimms that provide two 64 bit banks.the memory controller accesses first one bank and thn the other.
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| error correcting code ECC | detects and corrects error in a single bit
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| extended data out EDO | simm technology
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| fast page memory FPM | simm technology
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| general protection fault GPF | a windows error that occurs when a program attempts to access a memory address that is no longer available or is no longer assigned to it
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| memory bank | the memory a processor address at one time
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| parity | an error checking scheme in which a ninth or parity bit is added.value is either one or zero
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| parity error | an error that occurs when the number of ones in the byte is not in agreement with the expected number
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| Rambus |
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| RAS latency row access strobe | a method of measuring access timing to memory,which is the number of clock cycles required to write or read a row of data off a memory module
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| RDRAM |
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| re-marked chips | chips that have been used and returned to the factory,marked again and resold
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| RIMM | a type of memory module developed by Rambius
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| SIMM single inline memory module | a minitature circuit board used in older computers to hold ramm
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| single channel | the memory controller on a motherboard that can access only one dimm at a time
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| single ranked | dimms that provide only one 64 bit bank.all memory chips on the dimm are accessed at the same time
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| single sided | memory chips embedded on only a ssingle side of a dimm
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| SO-DIMM small outline DIMM | a type of memory module used in notebook computers that uses dimm technology
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| synchronous DRAM SDRAM | a type of memory stored on dimms that runs in sync with the system clock ,running the same speed as the motherboard
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| triple channels | when the memory controller accesses three dimms at the same time.
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| DIMM | a miniature circuit board installed on a motherboard to hold memory
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| SRAM | ram chips that retain information without the need for refreshing as long as the computers power is on
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| ddr | one notch 184 pins
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| sdram | two notches 168 pins
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| ddr2 | 240 pins notch in different location
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| ddr3 | 240 pins notch in different location
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| sram | used in processor memory caches
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| sdram | used on dimms
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| dimms | 64 bit data path
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| dimm | independent pins on opposite sides of the module
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| synchronized memory | runs in step with the processor and system clock and speeds measured in megahertz
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| ddr ram | it processes data when the beat rises and again when it falls,doubling the data rate of memory
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| single dimm | provide one memory bank to the processor 64 bit
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| double sided | refers to thhe physical location of the chips on the dimm
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| dual ranked | refers to how the memory on the dimm is addressed
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| double sided dimm | provide more then one bank,means the chips on the dimm are grouped so memory controller addresses one side and then the other
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| quad rank dimms | dimms that provide four banks,mostly on servers
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| siding | physical location
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| ranking | how it is adressed
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| ddr3 | permits chip capacities of up to 8 gigabytes
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| dual channels | double the speed of memory access
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| dimm speeds | measured in Mhz or PC rating
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| pc rating | measure of the total bandwith of data moving between the module and the cpu
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| pc rating | multiply bytes times megahertz
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| error correcting code | ram used in a server
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| ecc | detects and corrects in a single bit
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| ecc | can detect but not correct in two bits
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| parity error | always cayses the system to halt
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| even parity | number of ones to be even
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| odd parity | number of ones to be odd
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| buffers | hold data and amplify a signal just before the data is written to the module
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| registers | hold data and amplify a signal just before the data is written to the module
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| unbuffered dimm | doesnt support registers or buffers
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| position of notch on the left | identifies the module as registered,buffered,or unbuffered memory
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| notch on the right | identifies the voltage used by the module
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| cas latency | used more then ras latency;lower values better then higher ones
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| rimm | two notches and 184 pins
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| rimm | single notch and 232 pins
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| simm | rated by speed measured in nanoseconds
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| access time | the time it takes for the processor to request the data,for the memory controller to locate the data on the simm and
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| memory performance factors | total ram installed;memory technology;memory speed
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| latency | clock cycles
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