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aplus chapter 7

terms

QuestionAnswer
Burst EDO BEDO memory that is stored on 168-pim DIMM modules
CAS Latency column access strobe a method of measuring access time to memory, which is the number of clock cycles required to write or read a column of data off a memory module
C-RIMM continuity rimm a placeholder RIMM module that provides continuity so that every RIMM slot is filled.has no memory
DDR double data rate a computer bus that transfers data on both the rising and falling edges of the clock signal[1]. This is also known as double pumped, dual-pumped, and double transition.
DDR2 memory can send data on both the rising and falling edges of the processors clock cycles.
DDR3 has the ability to transfer data at twice the rate,eight times the speed of its internal memory arrays,enabling higher bandwith or peak data rates
direct rambius DRAM memory technology by rambus and intel that uses a narrow network type system bus
direct RDRAM
Double Data Rate SDRAM a type of memory technology used on DIMMS that runs at twice the speed of the system clock
DDR SDRAM II
double sided a dimm feature whereby memory chips are installed on both sides of a dimm
dual channels a motherboard feature that improves memory performance by providing two 64 bit channels between memory and the chipset
dual ranked double sided dimms that provide two 64 bit banks.the memory controller accesses first one bank and thn the other.
error correcting code ECC detects and corrects error in a single bit
extended data out EDO simm technology
fast page memory FPM simm technology
general protection fault GPF a windows error that occurs when a program attempts to access a memory address that is no longer available or is no longer assigned to it
memory bank the memory a processor address at one time
parity an error checking scheme in which a ninth or parity bit is added.value is either one or zero
parity error an error that occurs when the number of ones in the byte is not in agreement with the expected number
Rambus
RAS latency row access strobe a method of measuring access timing to memory,which is the number of clock cycles required to write or read a row of data off a memory module
RDRAM
re-marked chips chips that have been used and returned to the factory,marked again and resold
RIMM a type of memory module developed by Rambius
SIMM single inline memory module a minitature circuit board used in older computers to hold ramm
single channel the memory controller on a motherboard that can access only one dimm at a time
single ranked dimms that provide only one 64 bit bank.all memory chips on the dimm are accessed at the same time
single sided memory chips embedded on only a ssingle side of a dimm
SO-DIMM small outline DIMM a type of memory module used in notebook computers that uses dimm technology
synchronous DRAM SDRAM a type of memory stored on dimms that runs in sync with the system clock ,running the same speed as the motherboard
triple channels when the memory controller accesses three dimms at the same time.
DIMM a miniature circuit board installed on a motherboard to hold memory
SRAM ram chips that retain information without the need for refreshing as long as the computers power is on
ddr one notch 184 pins
sdram two notches 168 pins
ddr2 240 pins notch in different location
ddr3 240 pins notch in different location
sram used in processor memory caches
sdram used on dimms
dimms 64 bit data path
dimm independent pins on opposite sides of the module
synchronized memory runs in step with the processor and system clock and speeds measured in megahertz
ddr ram it processes data when the beat rises and again when it falls,doubling the data rate of memory
single dimm provide one memory bank to the processor 64 bit
double sided refers to thhe physical location of the chips on the dimm
dual ranked refers to how the memory on the dimm is addressed
double sided dimm provide more then one bank,means the chips on the dimm are grouped so memory controller addresses one side and then the other
quad rank dimms dimms that provide four banks,mostly on servers
siding physical location
ranking how it is adressed
ddr3 permits chip capacities of up to 8 gigabytes
dual channels double the speed of memory access
dimm speeds measured in Mhz or PC rating
pc rating measure of the total bandwith of data moving between the module and the cpu
pc rating multiply bytes times megahertz
error correcting code ram used in a server
ecc detects and corrects in a single bit
ecc can detect but not correct in two bits
parity error always cayses the system to halt
even parity number of ones to be even
odd parity number of ones to be odd
buffers hold data and amplify a signal just before the data is written to the module
registers hold data and amplify a signal just before the data is written to the module
unbuffered dimm doesnt support registers or buffers
position of notch on the left identifies the module as registered,buffered,or unbuffered memory
notch on the right identifies the voltage used by the module
cas latency used more then ras latency;lower values better then higher ones
rimm two notches and 184 pins
rimm single notch and 232 pins
simm rated by speed measured in nanoseconds
access time the time it takes for the processor to request the data,for the memory controller to locate the data on the simm and
memory performance factors total ram installed;memory technology;memory speed
latency clock cycles
Created by: cgeaski