Ch7-St2
Quiz yourself by thinking what should be in
each of the black spaces below before clicking
on it to display the answer.
Help!
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| General Protection Fault (GPF) | in the Intel x86 and AMD x86-64 architectures, and other unrelated architectures, is a fault gpf
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| memory bank | is a logical unit of storage in electronics, which is hardware dependent. In a computer the memory bank may be determined by the memory bank
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| parity | a symmetry property of physical quantities or processes under spatial inversion parity
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| parity error | checking is the storing of a redundant parity bit representing the parity (odd or even) of a small amount of computer data (typically one byte) stored in random access memory, and the subsequent comparison of the stored parity error
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| re-marked chips | is the chip manufacturer and who is the module manufacturer remarked chip
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| RIMM | is a memory module developed by Kingston Technology Corp. that takes up less space inside the computer than the older DIMM module and has different pin characteristics rimm
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| SIMM (single inline memory module) | is a type of memory module containing random access memory used in computers from the early 1980s to the late 1990s simm
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| Single channel | this is used on broadcast satellites to indicate that radio stations are not multiplexed as subcarriers onto a single video carrier, but instead independently share a transponder single channel
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| single ranked | is a set of DRAMs connected to the same chip select, and which are therefore accessed simultaneously single ranked
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| single-sided | is a type of random-access memory module which has its chips divided into two sides (called ranks), only one of which can be addressed at a time by the computer single sided
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| SO-DIMM (small outline DIMM) | is a type of computer memory built using integrated circuits so dimm
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| synchronous DRAM (SDRAM) | is dynamic random access memory (DRAM) that is synchronized with the system bus sdram
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| triple channels | is a technology that increases the transfer speed of data between the DRAM memory and the chipset memory controller by adding more channels of communication between them triple channels
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Created by:
Dgrobelny
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