br-ch6
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each of the black spaces below before clicking
on it to display the answer.
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| Advanced Configuration and Power Interface (ACPI) | Specification developed by Intel, Compaq, Phoenix, Microsoft, and Toshiba to control power on computers and other devices
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| back-side bus (BSB) | The portion of a processor's internal bus that connects the processor to the internal memory cache. The bus operates at a much higher frequency than the front side bus.
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| case fan | Fan inside a computer case used to draw air out of or into the case.
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| Centrino | A technology used by Intel whereby the processor, chipset, and wireless network adapter are all interconnected as a unit which improves laptop performance
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| chassis air guide (CAG) | Round air duct that helps to pull and direct fresh air from outside a computer case to the cooler and processor.
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| Cool’n’Quiet | Feature of AMD processors that lower power requirements and helps keep a system quiet.
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| Cooler | Combination cooling fan and heat sink mounted on the top or side of a processor to keep it cool.
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| DRAM (dynamic RAM) | Most common type of system memory, it requires refreshing every few milliseconds.
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| dual-core processing | Processor package that contains two core processors, supporting four instructions at once.
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| Enhanced Intel SpeedStep Technology (EIST) | Processor feature used by Intel that steps down processor frequency when the processor is idle to conserve power and lower heat.
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| Execute disable bit | Processor security feature by Intel that prevents software from executing or reproducing itself if it appears to be malicious.
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| front-side bus (FSB) | Bus between the CPU and memory on the motherboard. The bus frequency in documentation is called the system speed, such as 400 MHz. Also called the Memory bus, front-side bus, local bus, or host bus.
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| heat sink | Piece of metal, with cooling fins, that can be attached to or mounted on an intergrated chip (such as the CPU) to dissipate heat.
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| hyper-threading | Intel technology that allows each logical processor within the processor package to handle an individual thread in parallel with other threads being handled by other processors within the package.
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| hyper transport | AMD technology that allows each logical processor within the processor package to handle an individual thread in parallel with other threads being handled by other processors within the package.
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| internal bus | Bus inside the CPU that is used for communication between the CPU's internal components.
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| Level 1 (L1) cache | Memory on the processor die used as a cache to improve processor performance.
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| Level 2 (L2) cache | Memory in the processor package, but not on the processor die. The memory is used as a cache or buffer to improve processor performance.
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