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CS240 Sequence 1
Introduction, Processors, Instruction and program execution, DMA, Interrupts, Mu
| Question | Answer |
|---|---|
| What is the function of an Operating System? | >Exploits the hardware resources of one or more processors >Provides a set of services to system users >Manages secondary memory and I/O devices |
| What are the Basic Elements of an Operating System? | >Processor >Main Memory >I/O modules >System bus |
| How stable is main memory? | very volatile |
| What else is main memory referred too as? | > real memory > primary memory |
| What are I/O modules? | >secondary memory devices >communications equipment >terminals |
| What is a System bus ? | communication among processors, memory, and I/O modules |
| What registers are contained in a Processor ? | >I/O address register >I/O buffer register >Internal Registers |
| What are Internal Registers? | >Memory address register (MAR) >Memory buffer register (MBR) |
| What is a Memory address register (MAR)? | Specifies the address for the next read or write |
| What is a Memory buffer register (MBR)? | Contains data written into memory or receives data read from memory |
| What are the types of Processor Registers ? | >User-visible registers >Control and status registers |
| What are User Visible Registers? | Enable programmer to minimize main- memory references by optimizing register use |
| What are Control and status registers? | >Used by processor to control operating of the processor >Used by privileged operating-system routines to control the execution of programs |
| What are User-Visible Registers referenced by? | machine language |
| What is the availability of User-Visible Registers? | Available to all programs >application programs >system programs |
| What are the types of User-Visible Registers? | >Data >Address |
| What is contained in an Address Register? | >Index >Segment pointer >Stack pointer |
| What is an index ? | involves adding an index to a base value to get an address |
| What is a Segment Pointer? | When memory is divided into segments, memory is referenced by a segment and an offset |
| What is a Stack Pointer? | Points to top of stack |
| What are the types of Control and Status Registers ? | >Program Counter (PC) >Instruction Register (IR) >Program Status Word (PSW) |
| What is a Program Counter (PC)? | Contains the address of an instruction to be fetched |
| What is a Instruction Register (IR) ? | Contains the instruction most recently fetched |
| What are Program Status Word (PSW)? | >Condition codes >Interrupt enable/disable >Supervisor/user mode |
| What are Condition Codes or Flags? | Bits set by the processor hardware as a result of operations |
| What are some examples of Condition Codes? Condition Flags? | >Positive result >Negative result >Zero >Overflow |
| What are the steps of Instruction Execution? | >Processor reads instructions from memory >Processor executes each instruction |
| How many steps are in Instruction Execution? | two |
| What is the term for when the processor reads instructions from memory? | fetches |
| Describe the Program counter role in Instruction Fetch and Execution | >The processor fetches the instruction from memory >Program counter (PC) holds address of the instruction to be fetched next >Program counter is incremented after each fetch |
| Where is the fetched instruction placed? | in the instruction register |
| What are the categories of instruction registers? | >Processor-memory >Processor-I/O >Data processing >Control |
| What is the Processor-memory instruction register for? | transfers data between processor and memory |
| What is the Processor-I/O instruction register for? | data transferred to or from a peripheral device |
| What is data processing ? | arithmetic or logical operation on data |
| What is control instruction register used for? | alter sequence of execution |
| What is DMA an acronym for? | Direct Memory Access |
| What is a DMA? | >I/O exchanges occur directly with memory >Processor grants I/O module authority to read from or write to memory >Relieves the processor responsibility for the exchange |
| What is an Interrupt? | Interrupt the normal sequencing of the processor |
| What is generally slower than the processor? | I/O devices |
| Why are I/O devices slower than the processor? | Processor must pause to wait for device |
| What are classes of interrupts? | >Program >Timer >I/O >Hardware Failure |
| What is a Program Interrupt? | Generated by some condition that occurs as a result of an instruction execution |
| What are some examples of program interrupts? | >arithmetic overflow >division by zero >attempt to execute an illegal machine instruction >reference outside of a users allowed memory space |
| What is a Timer Interrupt? | Generated by a timer within the processor. Allows for Operating System to preform certain functions on a regular basis |
| What is an I/O Interrupt? | Generated by an I/O controller, to signal normal completion of an operation or to signal a variety of error conditions |
| What is a hardware failure interrupt? | generated by a failure, such as power failure or memory parity error |
| What is an interrupt handler? | Program to service a particular I/O device |
| What is the interrupt handler apart of? | generally operating system |
| what do interrupts do? | Suspends the normal sequence of execution |
| Explain the Interrupt Cycle | >Processor checks for interrupts >If no interrupts, fetch the next instruction for the current program >If an interrupt is pending, suspend execution of the current program, and execute the interrupt-handler routine |
| What is the hardware part of the simple interrupt processing cycle? | >device.controller/system.hardware.issues.an.interrupt >processor.finish.execution.current.instruction >processor.signals.acknowledgement.of.interrupt >processor.pushes.psw.pc.onto.control.stack >processor.load.new.pc.value.based.on.interrupt |
| What is the software part of the simple interrupt processing cycle? | >save remainder of process state information >process interrupt >restore process state information >restore old psw and pc |
| What are the ways to apply multiple interrupts? | >Disable interrupts while an interrupt is being processed >Define priorities for interrupts (interrupt within an interrupt) |
| What is multi-programing? | Processor has more than one program to execute |
| How are programs executed in multi-programing? | sequence is dependent on relative priority and whether they are waiting an I/O |
| What happens after an interrupt handler is finished executing during multi-programing? | control may not return to the program that was executing at the time of the interrupt |
| In regards to the memory hierarchy faster access time relates to cost in what way? | greater cost per bit |
| In regards to the memory hierarchy greater capacity relates to cost in what way? | smaller cost per bit |
| In regards to the memory hierarchy greater capacity is related to access speed in what way? | slower access speed |
| What is considered inboard memory? | >registers >cache >main memory |
| what is considered outboard storage? | >Magnetic Disk >CD ROM >CD RW >DVD- RIV >DVD RAM |
| what is considered off line storage? | >Magnetic Tape >MO >Worm |
| List the elements of the memory hierarchy from top to bottom | 1Registers 2Cache 3MainMemory 4Magnetic Disk 5Magnetic Tape |
| List the memory types in the hierarchy from top to bottom | >inboard memory >outboard memory >offline storage |
| What happens as you go down the memory hierarchy? | >decreasing cost per bit >increasing capacity >increasing access time >decreasing frequency of access of memory by the processor |
| How reliable is secondary memory? | nonvolatile |
| what is secondary memory refereed too as? | Auxiliary memory |
| What is secondary memory used for? | Used to store program and data files |
| What is a disk cache? | A portion of main memory used as a buffer to temporarily to hold data for the disk |
| what are disk writes? | clustered |
| What is cache memory not visible too? | operating system |
| what does cache memory do? | increase the speed of memory |
| what is faster than memory speed? | processor speed |
| what does cache memory exploit? | principle of locality |
| what does cache memory contain? | a copy of a portion of main memory |
| what does the processor check first? | cache |
| what happens if the data the processor is looking for is not found in cache? | the block of memory containing the needed information is moved to the cache and delivered to the processor |
| what are the elements involved in cache design ? | >Cache size >Block size >Mapping function >Replacement algorithm >Write policy |
| What is the significance of cache size? | Small caches have a significant impact on performance |
| What is a block size? | The unit of data exchanged between cache and main memory |
| What is a mapping function? | Determines which cache location the block will occupy |
| What is the Replacement algorithm ? | Determines which block to replace |
| What is an example of a Replacement algorithm? | Least-Recently-Used (LRU) algorithm |
| When does write policy occur? | when the memory write operation takes place |
| How can the write policy occur? | >every time block is updated >only when block is replaced |
| what are the key features of using a write policy where it only happens when block is replaced | >Minimizes memory write operations >Leaves main memory in an obsolete state |
| Explain Programed I/O | >I/O module performs the action, not the processor >Sets appropriate bits in the I/O status register >No interrupts occur >Processor checks status until operation is complete |
| what is the term for when the Processor checks status until operation is complete | polling |
| Explain Interrupt Driven I/O | >Processor is interrupted when I/O module ready to exchange data >Processor saves context of program executing and begins executing interrupt-handler |
| What are the advantages of Interrupt Driven I/O | no needless waiting |
| What are the disadvantages of Interrupt Driven I/O | consumes a lot of processor time because every word read or written passes through the processor |
| Explain Direct Memory Access | >Transfers a block of data directly to or from memory >An interrupt is sent when the transfer is complete >Processor continues with other work |
Created by:
ToriOverholtzer
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