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COMP2 MLA
Machine Level Architecture
| Term | Definition |
|---|---|
| Processor | Responsible for executing programmes and supervising the functioning of other parts of the system |
| Main Memory | Also known as the immediate access store (IAS), is a store for programme instructions and data |
| RAM | Random access memory is used for memory that is readable and writable – it is volatile and data is forgotten when the power is turned off |
| ROM | Read-only memory is used to hold fixed programmes – it is not volatile and does not forget data is not forgotten when the power is turned off |
| EEPROM | Electrically erasable programmable read-only memory does allow the contents to be altered – it is often found in SIM-cards, MP3 players and memory sticks |
| Bus | Acts as a connecting tube between three components that can transmit a single binary word or an address between the processor and the store or I/O component |
| Data Bus | A bidirectional bus, typically consisting of 32 wires, used to transport data between the three components of the three box model |
| Address Bus | A unidirectional bus, typically consisting of 32 wires, used to address memory and I/O locations |
| Control Bus | A bidirectional bus, typically consisting of 8 wires, used to transport control signals between the three components of the three-box model |
| I/O Device | a hardware unit that sends or receives data or stores data by communicating with the processor and main memory through an I/O controller |
| I/O Controller | An electronic circuit that connects to a system bus and an I/O device; it provides correct voltages and currents for the system bus and the I/O device |
| Peripherals | A computer device that is not part of the CPU – it can be external, mouse, or internal, CD-ROM drive |
| CPU | Central processor unit – processor and main memory |
| Secondary Storage | Permanent storage memory that is not directly connected to the processor |
| Addressable Memory | Each memory location has a main memory address – a unique numeric code that can be used to retrieve data stored at that location |
| Stored Program Concept | 1)A program must be resident in main memory to be executed 2)Machine code instructions are fetched, one after another, from main memory in sequence and are executed, one at a time, in the processor |
| Microcontroller | A complete computer (processor, memory and I/O) on a single chip |
| Program Control Unit | Fetches program instructions from memory, decodes them and excutes them one at a time |
| Arithmetic and Logic Unit (ALU) | Performs arithmetic and logical operations on data such as addition and subtraction; fixed-point arithmetic; Boolean logic such as AND, OR, XOR; and a range of shift operations |
| Registers | Fast memory locations inside the processor (or an I/O controller) that may be dedicated or general-purpose |
| Internal Clock | Derived directly or indirectly from the system clock |
| Internal Bus | Several internal buses link the control unit, the ALU and the registers |
| Logic Gates | used for flow control. |
| System Clock | Regulate the rate at which instructions are executed and to synchronise the operation of various computer components |
| General-Purpose Register | A register not assigned a specific role by the processor designer – programmers may use general-purpose registers |
| Dedicated Register | A register assigned a specific role by the processor designer – programmers may use some but not all dedicated registers |
| Stack Pointer | points to a stack holding return addresses, procedure or function parameters, and local variables; it is accessed when a procedure or function is called or an interrupt is serviced |
| Program Counter | Points to the next instruction to be fetched and executed |
| Status Register | Holds condition codes to indicate the outcome of operations |
| Accumulator | Holds the result of the current set of calculations. |
| Current Instruction Register (CIR) | Holds the current instruction to be executed while it is decoded and executed |
| Memory Address Register (MAR) | Holds the address of the memory location currently being accessed by the processor |
| Memory Buffer Register (MBR) | Holds the data item being transferred to or from the memory location currently being accessed by the processor |
| Clock Speed | Of a processor, the frequency in megahertz or gigahertz at which the processor executes instructions |
| Word Length | The number of digits in a binary word |
| Bus Width | The number of signal wires or lines allocated to the bus |
| Machine Code Instruction | A binary code that a machine can understand and execute |
| Compile High-Level Language Program | A program translated into machine code before it is executed on a digital computer |
| Op-Code | The part of a machine code instruction that denotes the basic machine operation |
| Operand | The part of a machine code instruction that represents a single item of binary data or the address of a single item of binary data |
| Instruction Set | The set of bit patterns or binary codes for the machine operations that a processor has been designed to perform |
Created by:
hcottrell
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