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Architecture Final

For m architecture final

QuestionDefinition
Pipeline Hazard A situation in which the next instruction cannot complete execution one clock cycle after completion of the present instruction.
Data Hazard An instruction cannot be completed because the needed data, to be generated by another instruction in the pipeline, is not available.
Structural Hazard Two instructions cannot execute due to a resource conflict.
Control Hazard Instruction to be fetched is not known. Use a branch as an example.
Read After Read An Instruction needs to read data after the previous instruction has read it.
Read After Write An instruction needs to read data after the previous instruction has written to it
Write After Read An instruction needs to write data after the previous instruction has read from it.
Direct-Mapped Cache A cache structure in which each cache location is mapped to exactly one location in the main memory
Fully-associative Cache A cache structure in which every memory location is mapped to exactly one location in the cache.
Set-Associative Cache A cache structure that has a fixed number of locations where each block can be placed (A set)
The Principle of Locality A program tends to access data that forms a physical cluster in the memory - Multiple accesses may be made within the same block.
Temporal Locality If an item is referenced, it will tend to be referenced again.
Cache Coherence The process of ensuring that the copy of a data in cache is identical to the copy in memory.
Created by: Ultric
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