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ms-ch7-stack1
| Question | Answer |
|---|---|
| Burst EDO (BEDO) | A redefined version of BEDO memory that significantly improved access time over EDO. |
| CAS Latency (CL) | A method of measuring access timing to memory, which is the number of clock cycles required to write or read a column of data off a CL memory module. |
| C-RIMM (Continuity RIMM) | A placeholder C-RIMM module that provides continuity so that every RIMM slot is filled |
| DDR2 | A version of SDRAM that is to faster than DDR and uses less power. |
| DDR3 | An improvement over DDR and DDR2 that is faster and uses less power. |
| Direct Rambus DRAM | A memory technology by Direct Rambus and Intel that uses a narrow network-type system bus. Memory is stored on a RIMM module. Also called RDRAM or Direct RDRAM. |
| Double Data Rate SDRAM | A type of date rate memory technology used on DIMMs that runs at twice the speed of the system clock. |
| DDR SDRAM | An abbreviation for Double Data Rate SDRAM. |
| double-sided | A DIMM with memory chips installed on both sides of the dounble sided module. |
| dual channels | A motherboard feature that improves memory performance by providing two 64-bit dual channels between memory and the chipset. DDR and DDR2 memory can use dual channels. |
| dual ranked | Double-sided DIMMs that provide two 64-bit banks that are dual ranked. |
| dynamic RAM (DRAM) | The most common type of system DRAM memory, it requires refreshing every few milliseconds. |
| ECC (error-correcting code) | A chipset feature on a motherboard that checks the integrity of data stored on DIMMs or RIMMs and can correct single-bit errors in a byte. More advanced ECC schemas can detect, but not correct, double-bit errors in a byte. |
| EDO (extended data out) | A type of outdated RAM that was faster than conventional RAM because it eliminated the delay before it issued the next EDO memory address. |
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msinclair62
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