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bm-chap7-stack1
| Burst EDO | A refined version of EDO memory that significantly improved access time over EDO. |
| CAS Latency | A method of measuring access timing to memory. |
| C-RIMM | Placeholder for RIMM module that provides continuity so that every RIMM slot is filled. |
| DDR2 | A version of SDRAM that that is faster than DDR and uses less power |
| DDR3 | Version of SDRAM that is faster than DDR2 memory and that can use triple channels. |
| Direct Rambus DRAM | Memory technology by Rambus and Intel that uses a narrow network-type system bus. |
| Double Data Rate SDRAM | A type of memory technology used on DIMMs that runs at twice the speed of the system clock. |
| DDR SDRAM | An abbreviation for Double Data Rate SDRAM. |
| double-sided | A DIMM with memory chips installed on both sides of the module. |
| dual channels | A motherboard feature that improves memory performance by providing two 64-bit channels between memory and the chipset. DDR and DDR2 memory can use dual channels. |
| dual ranked | Double-sided DIMMs that provide two 64-bit banks. |
| dynamic RAM (DRAM) | The most common type of system memory, it requires refreshing every few milliseconds. |
| ECC (error-correcting code) | A chipset feature on a motherboard that checks the integrity of data stored on DIMMs or RIMMs and can correct single-bit errors in a byte. More advanced ECC schemas can detect, but not correct, double-bit errors in a byte. |
| EDO (extended data out) | A type of outdated RAM that was faster than conventional RAM because it eliminated the delay before it issued the next memory address. |