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rh-ch7-stack1
| Burst EDO (BEDO) | Answer |
|---|---|
| CAS Latency (CL) | the delay time between the moment a memory controller tells the memory module to access a particular memory column on a RAM module |
| C-RIMM (Continuity RIMM) | an inexpensive pass through module that allows for a continuous signal for computers with RIMM memory. |
| DDR2 | a double data rate synchronous dynamic random-access memory interface. |
| DDR3 | an abbreviation for double data rate type three synchronous dynamic random access memory, is a modern kind of dynamic random access memory (DRAM) with a high bandwidth interface, and has been in use since 2007. |
| Direct Rambus DRAM | One of the two main competing standards to replace SDRAM |
| Double Data Rate SDRAM | a class of memory integrated circuits used in computers. |
| DDR SDRAM | is synchronous dynamic RAM (SDRAM) that can theoretically improve memory clock speed to at least 200 MHz |
| double-sided | A magnetic or optical disc that is recorded on both sides. |
| dual channels | refers to the DDR or DDR2 chipset on certain motherboards designed with two memory channels instead of one. |
| dual ranked | a modern DIMM that consists of two ranks |
| dynamic RAM (DRAM) | type of RAM that only holds its data if it is continuously accessed by special logic called a refresh circuit. |
| ECC (error-correcting code) | allows data that is being read or transmitted to be checked for errors and, when necessary, corrected on the fly. |
| EDO (extended data out) | a type of random access memory (RAM) chip that improves the time to read from memory on faster microprocessors such as the Intel Pentium. |
| FPM (fast page memory) | was the most common kind of DRAM in personal computers. |
| Burst EDO (BEDO) | is a newer EDO DRAM that is capable of processing four memory addresses in one burst. |