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ab ch7 stack1

Burst EDO (BEDO) A refined version of EDO memory that significantly improved access time over EDO. BEDO was not widely used because Intel chose not to support it. BEDO memory is stored on 168-pin DIMM modules.
CAS Latency (CL) A method of measuring access timing to memory, which is the number of clock cycles required to write or read a column of data off a memory module. Stands for Column Access Strobe.
C-RIMM (Continuity RIMM) A placeholder RIMM module that provides continuity so that every RIMM slot is filled
DDR2 A version of SDRAM that is faster than DDR and uses less power
DDR3 A version of SDRAM that is faster than DDR2 memory and that can use triple channels
Direct Rambus DRAM A memory technology by Rambus and Intel that uses a narrow network-type system bus. Memory is stored on a RIMM module.
Double Data Rate SDRAM (DDR SDRAM) A type of technology used on DIMMs that runs at twice the speed of the system clock.
DDR SDRAM A type of technology used on DIMMs that runs at twice the speed of the system clock.
double-sided A DIMM feature whereby memory chips are installed on both sides of a DIMM.
dual channels A motherboard feature that improves memory performance by providing two 64-bit channels between memory and the chipset. DDR, DDR2, and DDR3 DIMMs can use dual channels.
dual ranked Double-sided DIMMs that provide two 64-bit banks. The memory controller access first one bank and then the other. Dual-ranked DIMMs do not perform as well as single-ranked DIMMs.
dynamic RAM (DRAM) The most common type of system memory, it requires refreshing every few milliseconds.
ECC (error-correcting code) A chipset feature on a motherboard that checks the integrity of the data stored on DIMMs or RIMMs and can correct singe-bit errors in a byte.
EDO (extended data out) A type of outdated RAM that was faster than conventional RAM because it eliminated the delay before it issued the next memory address.
FPM (fast page memory) An outdated memory mode used before the introduction of EDO memory. FPM improved on earlier memory types by sending the row address just once for many accesses to memory near that row.
Created by: abrophy11



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