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Question | Answer |
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Burst EDO (BEDO) | A variant on EDO DRAM in which read or write cycles are batched in bursts of four. |
CAS Latency (CL) | The delay time between the moment a memory controller tells the CAS Latency (CL) memory module to access a particular memory column on a RAM module, and the moment the data from the given array location is available on the module's output pins. |
C-RIMM (Continuity RIMM) | an inexpensive pass through module that allows for a continuous signal for computers with C-RIMM memory. |
DDR2 | DDR2 memory can send data on both the rising and falling edges of the processor's clock cycles. |
DDR3 | DDR3 is a modern kind of dynamic random access memory (DRAM) with a high bandwidth interface, and has been in use since 2007 |
Direct Rambus DRAM | One of the two main competing standards to replace SDRAM is called Direct Rambus DRAM or DRDRAM |
Double Data Rate SDRAM | Double Data Rate SDRAM is a class of memory integrated circuits used in computers |
DDR SDRAM | DDR SDRAM is a class of memory integrated circuits used in computers |
double-sided | double sided |
dual channels | dual channel refers to the DDR or DDR2 chipset on certain motherboards designed with two memory channels instead of one. |
dual ranked | dual ranked |
dynamic RAM (DRAM) | Dynamic RAM is a type of RAM that only holds its data if it is continuously accessed ... If this is not done regularly, then the DRAM will lose its contents |
ECC (error-correcting code) | ECC is used to verify data transmissions by locating and correcting transmission errors. |
EDO (extended data out) | EDO is a modified form of Fast Page Mode (FPM) memory |
FPM (fast page memory) | FPM is slightly faster than conventional DRAM. |