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kh-ch6-stack1
| Question | Answer |
|---|---|
| Advanced Configuration and Power Interface (ACPI) | Controls PoweR on computers and other devices |
| back-side bus (BSB) | The BSB portion of a processor's internal bus that connects the processor to the internal memory cache |
| case fan | A fan inside the computer's case used to draw air out of or into the fan |
| Centrino | A technology used by Intel whereby the processor, chipset,centrino and wireless network adapter are all interconnected as a unit which improves laptop performance |
| chassis air guide (CAG) | A round air duct that helps to pull and direct fresh air from outside a computer case to the cooler and processor |
| Cool’n’Quiet | A feature of AMD processors that lowers power requirements and helps keep a system Quiet |
| Cooler | A combination of cooling fan and heat sink mounted on the top or side of a processor to keep it cool |
| DRAM | The most common type of system memory, it requires refreshing every few dram milliseconds. |
| dual-core processing | A processor package that contains two core processors, thus supporting four instructions at once |
| Enhanced Intel SpeedStep Technology (EIST) | Steps down processor frequency when the processor is idle to conserve power and lower heat eist |
| Execute disable bit | A processor security feature by intel that prevents software from executing or reproducing itself if it appears to be malicious |
| front-side bus (FSB) | front side bus |
| heat sink | A piece of metal, with cooling fins, that can be attached to or mounted on an integrated chip to dissipate Heat. |
| hyper-threading | The intel technology that allows each logical processor within the processor package to handle an individual thread in parallel with other threads being handled by other processors within the package |
| hyper transport | The AMD technology that allows each logical processor within the processor package to handle an individual individual thread in parallel with other threads being hyper transport handled by other processors within the package |
| internal bus | memory Bus or system Bus or front-Side-Bus, connects all the internal components of a computer |
| Level 1 (L1) cache | often called primary cache, is a static memory integrated with processor core that is used to store information recently accessed |
| Level 2 (L2) cache | Level 2 cache, also called secondary cache, is a memory that is used to store recently accessed information. |
Created by:
kevin92995
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