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ng-st1-ch6 -Support
Chapter 6 - Support processors #1
| Question | Answer |
|---|---|
| Advanced Configuration and Power Interface (ACPI) | The current set of standards that is used by BIOS, hardware, and the OS to manage power. Advanced Configuration and Power Interface (ACPI) |
| back-side bus (BSB) | The bus between the CPU and the L2 cache inside the CPU housing, back-side bus (BSB) |
| case fan | Help to draw air into and out of the case. case fan |
| Centrino | Intel's mobile processor technology. Using the Centrino technology, the Intel processor, chipset, and wireless network adapter are all interconnected as a unit, which improves laptop performance. Centrino |
| chassis air guide (CAG) | Part of the case design. This air guide is a round air duct that helps to pull and direct fresh air from outside the case to the cooler and processor. chassis air guide (CAG) |
| Cool’n’Quiet | AMD technology to lower power requirements and helps keep a system quiet. Cool’n’Quiet. |
| Cooler | A combination cooling fan and heat sink mounted on the top or side of a processor to keep it cool. Cooler. |
| DRAM | Memory modules (DIMMs) on the motherboard. DRAM. |
| dual-core processing | Two processors contained in the same processor housing that share the interface with the chipset and memory. dual-core processing. |
| Enhanced Intel SpeedStep Technology (EIST) | Intel's technology to put the processor in a sleep state when they are inactive and reduce voltage requirements and CPU frequency depending on the demands placed on the processor. Enhanced Intel SpeedStep Technology (EIST) |
| Execute disable bit | An Intel security feature that prevents software from executing or reproducing itself if it appears to be malicious. Execute disable bit. |
| front-side bus (FSB) | Another term for the system bus, front-side bus (FSB) |
| heat sink | A piece of metal, with cooling fins, that can be attached to or mounted on an integrated chip (such as the CPU) to dissipate heat. heat sink |
| hyper-threading | Intel's technology to allow each logical processor within the processor package to handle an individual thread in parallel with other threads being handled by other processors within the package, hyper-threading |
| hyper transport | AMD's technology to allow each logical processor within the processor package to handle an individual thread in parallel with other threads being handled by other processors within the package. hyper transport |
| internal bus | The bus inside the CPU that is used for communication between the CPU's internal components. internal bus |
| Level 1 (L1) cache | A type of internal cache (L1). |
| Level 2 (L2) cache | A type of internal cache (L2). |