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Ch 6 Stack
| Question | Answer |
|---|---|
| L1 cache | Memory on the processor die |
| L2 cache | Memory on the processor package |
| L3 cache | Memory on the processor core |
| Hyper-Threading | Technologies used by processor |
| HyperTransport | Another technology used by processors |
| Front Side Bus | A bus that connects to the front side of the processor |
| Internal Bus | A bus that controls signals |
| Back Side Bus | The internal bus that connects to the processor |
| Processor Frequency | The speed the processor operates |
| Multiplier | A processor that operates at four times the system bus frequency |
| Overclocking | Running the motherboard at a higher speed than normal |
| Multiprocessor Platform | A method of improving performance on a processor |
| Multi-Core Processing | The latest advancement in multiple processing |
| Dual Core | Supports four instructions at once |
| Triple Core | Supports six instructions at once |
| Quad Core | Supports eight instructions at once |
| Octo Core | Supports sixteen instructions at once |
| Memory Cache | A RAM that holds data |
| DRAM | dynamic RAM |
| SRAM | static RAM |
| Multimedia Extensions | first system to support repetitive looping |
| Streaming SIMD Extension | An improvment over MMX |
| SIMD | Single Instruction, Multiple Data |
| 3DNow! | Improves 3D performance |
| SSE2 | Improves 3D images in games |
| PowerNow! | Increases performance and lowers power requirments |
| Cool'n'Quiet | Lowers power requirment |
| EIST | Enhanced Intel SpeedStep Technology |
| Execute Disable Bit | Prevents software from executing or reproducing itself |
| Centrino | Interconnects processors, chipsets and wireless networks |