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Chapter 6 stack 1
| Term | Definition |
|---|---|
| Advanced Configuration and Power Interface (ACPI) | Specification developed by Intel, Compaq, Phoenix, Microsoft, and Toshiba to control power on computers and other devices. |
| back-side bus (BSB) | The portion of the internal bus that connects the processor to the internal memory cache called the BSB |
| case fan | This helps draw air out of the case. |
| Centrino | Using this intel processor, chipset, and wireless network adapter are all interconnected as a unit, which improves the laptop performance. |
| chassis air guide (CAG) | a round air duct that helps to pull and direct fresh air from outside a computer case to the cooler and processor. |
| Cool’n’Quiet | by AMD lowers power requirements and helps keep a system quiet. |
| Cooler | A combination cooling fan and heat sink mounted on the top or side of a processor to keep it cool. |
| DRAM | memory stored on memory modules on the motherboard; loses data rapidly and must refresh often |
| dual-core processing | supports four instructions at once |
| Enhanced Intel SpeedStep Technology (EIST) | by Intel steps down processor frequency when the processor is idle to conserve power and lower heat. |
| Execute disable bit | Is a intel is a security feature that prevents software from executing or reproducing itself if it appears to be malicious. |
| front-side bus (FSB) | Because it connects to the front side of the processor that faces the outside world. |
| heat sink | A piece of metal, with cooling fins, that can be attached to or mounted on an integrated chip (such as the CPU) to dissipate heat. |
| hyper transport | allow each logical processor within the processor package to handle an individual thread in parallel with other threads by other processors within the package |
| internal bus | data/instruction/control signals portion of the bus, 32 bits wide. |
| Level 1 (L1) cache | memory on the processor die; also called L1 |
| Level 2 (L2) cache | memory in the processor package but not on the die; also called L2 |
| Level 3 (L3) cache | memory farther from the processor core but still in the package; also called L3 |
| liquid cooling system | The most popular method of cooling a processors. A small pump sits inside of the computer case, and tubes move water or other liquid around the components and then away from them to a place where fans can cool the liquid. |
| memory cache | a small amount of faster RAM that stores recently retrieved data, in anticipation of what the CPU will request next, thus speeding up access. |
| MMX (Multimedia Extensions) | Was the first technology to support repetitive looping, Where by the processor receives an instruction and then applies it to a stream of data process it. |
| multi-core processing | processor housing contains two or more cores that operate at the same frequency, but independently of each other. |
| multiplier | In the case the processor operates at four times the system bus frequency. If you multiply the system bus frequency by the multiplier you get the processor frequency |
| multiprocessor | able to utilize more than one processor |
| octo | supporting sixteen instructions at once |
| overclocking | Running a motherboard or processor at a higher speed than the manufacturer suggested is called overclocking and it is not recommended because the speed is not guaranteed to be stable. |
| PowerNow | by AMd increases performance and lowers power requirements. |
| processor frequency | speed at which the processor operates internally |
| quad core | supports eight instructions at once |
| S1 state | Hard drive is turned off and everything else runs normally. Sleep mode. |
| S2 state | The hard drive, monitor, and processor are turned off. |
| S3 state | Everything is shut down except RAM. |
| static RAM (SRAM) | memory stored in a memory cache |
| stop errors | An error at the kernel level that is severe enough to cause the operating system to stop all processes. |
| thermal compound | this is placed between the bottom of the cooler heat sink and the top of the processor. |
| triple core | supports six instructions at once |
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13rmccammitt
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