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cp chp 6 stack 1
| Term | Definition |
|---|---|
| Advanced Configuration and Power Interface (ACPI) | specification developed by Intel, Compaq, Pheonix, Microsoft, and Toshiba to control power on computers |
| back-side bus (BSB) | the portion of the internal bus that connects the processor to the internal memory cache |
| case fan | a fan inside a computer case used to draw air out of or into the case |
| Centrino | using Centrino, the Intel processor, chipset, and wireless network adapter are all interconnected as a unit centrino |
| chassis air guide (CAG) | a round air duct that helps to pull and direct fresh air from outside a computer case to the cooler and processor cag |
| Cool’n’Quiet | AMD lowers power requirements and helps keep a system quiet coolnquiet |
| Cooler | a combination cooling fan and heat sink mounted on the top or side of a processor cooler |
| DRAM | (dynamic RAM) performance also improves because RAM is stored in memory modules dram |
| dual-core processing | supporting 4 instructions at once 2core pro |
| Enhanced Intel SpeedStep Technology (EIST) | a processor feature used by Intel that steps down processor frequency eist |
| Execute disable bit | a security feature that prevents software from executing or reproducing itself if it appears to be malicious edb |
| front-side bus (FSB) | connects to the front side of the processor that faces the outside world. fsb |
| heat sink | a piece of metal, with cooling fins, that can be attached or mounted to an integrated chip |
| hyper-threading | hyper threading allows each logical processor within the processor package to handle an individual thread in parallel with other threads being handled by other processors within the package (threading) |
| hyper transport | hyper transport allows each logical processor within the processor package to handle an individual thread in parallel with other threads being handled by other processors within the package (transport) |
| internal bus | the AMD technology that allows each logical processor within the processor package to handle an individual thread in parallel with other threads internal bus |
| Level 1 (L1) cache | memory on the processor die L1 |
| Level 2 (L2) cache | memory in the processor package, but not on the processor die L2 |
| Level 3 (L3) cache | a processor cache farther from the processor core, but still in the processor package L3 |
| liquid cooling system | a method to cool overclocked processors liquid |
| memory cache | RAM that holds data and instructions that the memory controller anticipates the processor will need next mem cache |
| MMX (Multimedia Extensions) | 1st technology to support repetitive looping, whereby the processor receives an instruction and then applies to a stream of data that follows mmx |
| multi-core processing | using this technology, the processor housing contains 2 or more cores that operate at the same frequency mc pro |
| multiplier | the processor operates at four times the speed multiplier |
| multiprocessor | installing more than one processor on a motherboard |
| octo core | supports 16 instructions at once octocore |
| overclocking | running a motherboard or processor at a higher speed than the manufacturer suggests overclocking |
| PowerNow! | AMD increases performance and lowers power requirements powernow |
| processor frequency | the speed at which the processor operates internally frequency |
| quad core | supports 8 instructions at once quad |
| S1 state | the ACPI power saving mode where the hard drive and monitor are turned off and everything else runs normally s1 |
| S2 state | the ACPI power saving mode where the hard drive, monitor, and processor are turned off s2 |
| S3 state | the ACPI power saving mode where everything except the RAM is shut down s3 |
| static RAM (SRAM) | memory in a memory cache sram |
| stop errors | an error at the kernel level that is severe enough to cause the operating system to stop all processes stop errors |
| thermal compound | a creamlike substance that is placed between the bottom of the cooler heatsink and the top of the processor to eliminate air pockets thermal compound |
| triple core | supports 6 instructions at once triple core |
Created by:
ChrisxPirrone
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