km-ch7-stack1 Word Scramble
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Term | Definition |
Burst EDO (BEDO) | A variant on EDO DRAM in which read or write cycles are batched in bursts of four. |
CAS Latency (CL) | Column Address Strobe latency is delay time between moment a memory controller tells the memory module to access a particular memory column on a RAM module, and the moment the data from the given array location is available on the module's output pins. |
C-RIMM (Continuity RIMM) | C-RIMM is an inexpensive pass through module that allows for a continuous signal for computers with RIMM memory. |
DDR2 | DDR2 SDRAM is a double data rate synchronous dynamic random-access memory interface. |
DDR3 | In computing, DDR3 SDRAM, an abbreviation for double data rate type three synchronous dynamic random access memory, is a modern kind of dynamic random access memory (DRAM) with a high bandwidth interface, and has been in use since 2007. |
Direct Rambus DRAM | DRAM A memory technology by Rambus and Intel that uses a narrow network-type system bus. Memory is stored on a RIMM module. Also called RDRAM or Direct RDRAM. |
Double Data Rate SDRAM | A type of memory technology used on DIMMs that runs at twice the speed of the system clock. |
DDR SDRAM | An abbreviation for Double Data Rate SDRAM |
double-sided | A DIMM with memory chips installed on both sides of the module. |
dual channels | A motherboard feature that improves memory performance by providing two 64-bit channels between memory and the chipset. DDR and DDR2 memory can use dual channels. |
dual ranked | Double-sided DIMMs that provide two 64-bit banks. |
dynamic RAM (DRAM) | The most common type of system memory, it requires refreshing every few milliseconds. |
ECC (error-correcting code) | A chipset feature on a motherboard that checks the integrity of data stored on DIMMs or RIMMs and can correct single-bit errors in a byte. More advanced ECC schemas can detect, but not correct, double-bit errors in a byte. |
EDO (extended data out) | A edo type of outdated RAM that was faster than conventional RAM because it eliminated the delay before it issued the next memory address. |
FPM (fast page memory) | FPM Can be used with 30-pin or 72-pin SIMMs or some really old 168-pin DIMMs |
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13kmacfarland
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