Busy. Please wait.
Log in with Clever
or
show password
Forgot Password?
Don't have an account?  Sign up 
Sign up using Clever
or
Username is available taken
show password

Your email address is only used to allow you to reset your password. See our Privacy Policy and Terms of Service.

Already a StudyStack user? Log In

Reset Password
Enter the associated with your account, and we'll email you a link to reset your password.

Alexsander Milenkovic

Quiz yourself by thinking what should be in each of the black spaces below before clicking on it to display the answer.
        Help!  

Question
Answer
show TRUE  
🗑
show TRUE  
🗑
Interrupts cannot be triggered from software (e.g., by setting a flag bit by the BIS instruction).   show
🗑
show TRUE  
🗑
When multiple interrupt requests are pending at the same time, the MSP430 will first serve the longest pending one (i.e, the one that arrived first).   show
🗑
An interrupt service routine for a serial communication device can return an output parameter as shown below. #pragma vector=USART1RX_VECTOR __interrupt char usart1_rx () {...}   show
🗑
Interrupts can be triggered by external or internal hardware events and may occur at unpredictable times (i.e., asynchronous to program execution).   show
🗑
show FALSE  
🗑
show TRUE  
🗑
show TRUE  
🗑
Interrupt vector table is located in flash memory at known address.   show
🗑
show FALSE  
🗑
Interrupts coming from ports P1 and P2 can be enabled or disabled at any time in software.   show
🗑
An interrupt enable bit associated with a peripheral is always automatically cleared upon accepting the corresponding interrupt request.   show
🗑
show FALSE  
🗑
show FALSE  
🗑
When multiple interrupt requests are pending at the same time, the MSP430 accepts the one that arrived first (earliest in time).   show
🗑
Each entry in the interrupt vector table contains the starting address of the corresponding interrupt service routine.   show
🗑
Nesting of interrupt service routines by default is disabled in MSP430 because the GIE bit is cleared during exception processing.   show
🗑
show TRUE  
🗑
Interrupts typically arise asynchronously to program execution.   show
🗑
What is the size of the interrupt vector table in bytes for an MSP430 that has 32 entries in the interrupt vector table?   show
🗑
Where is the interrupt vector table from 2.A located (give the address range)?   show
🗑
What is the last instruction in an ISR (Interrupt Service Routine) and what does it do?   show
🗑
How many external interrupts (those that originate outside the MSP chip) an MSP430 could serve? How many ISRs are devoted to handling such interrupts?   show
🗑
List registers used to record interrupt requests:   show
🗑
show IE1, IE2, P1.IE, P2.IE  
🗑
show 1. Retrieves the status register from the stack. 2. Retrieves the program counter from the stack.  
🗑
show Serves to mask all maskable interrupts. It is located in the status register (R2).  
🗑
show Program counter and the status register (PC and SR).  
🗑
How does the interrupt vector table get initialized?   show
🗑
What steps need to be taken in interrupt service routines that serve multi-source requests?   show
🗑
show ISR_P1  
🗑


   

Review the information in the table. When you are ready to quiz yourself you can hide individual columns or the entire table. Then you can click on the empty cells to reveal the answer. Try to recall what will be displayed before clicking the empty cell.
 
To hide a column, click on the column name.
 
To hide the entire table, click on the "Hide All" button.
 
You may also shuffle the rows of the table by clicking on the "Shuffle" button.
 
Or sort by any of the columns using the down arrow next to any column heading.
If you know all the data on any row, you can temporarily remove it by tapping the trash can to the right of the row.

 
edit
Embed Code - If you would like this activity on your web page, copy the script below and paste it into your web page.

  Normal Size     Small Size show me how
Created by: evinsmc
Popular Engineering sets