DE_KeyTerms_Unit 1.2
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| Instantaneous voltage of a waveform-maximum or peak or pulse | Amplitude
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| Series of logic 1s and 0s plotted as a function of time | Digital Waveform
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| Duty Cycle | Fraction of the total period that waveform is in the HIGH state.
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| The part of the pulse that is in transition from HIGH to LOW | Falling Edge
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| The numbers of cycles per unit of time | Frequency
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| Unit of Frequency measured in cycles per second | Hertz
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| The higher of the two voltages in a digital system. | Logic HIGH
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| The lower of two voltages in a digital system. | Logic LOW
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| A piece of electrical equipment used to view a variety of waveforms | Oscilloscope
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| the amount of time measured in one complete cycle | Period
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| Testing design function | Simulation
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| Where amplitude varies in proportion to the sine function of an angle. | Sine Wave
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| An almost instantaneous rise and decay of voltage or current in a periodic pattern. | Square Wave
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| TTL-compatible IC that can be wired to operate in several different modes, such as a one-shot | 555 Timer
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| An algebraic expression made up of Boolean variables and operators, such as AND (-), OR (+) or NOT (-). | Boolean Expression
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| A type of flip-flop in which the D (data) input is the synchronous input. | Clocked D Flip-Flop
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| One style of integrated circuit package which has two rows of leads | Dual In-Line Package (DIP)
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| A sequential circuit based on a latch whose output changes when it's clock input receives a pulse. | Flip-Flop
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| An electronic circuit having many components, such as transistors, diodes, resistors, and capacitors, in a single package. | Integrated Circuit (IC)
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| Also called a NOT gate or an inverting buffer. | Invertor
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| A diagram, similar to a schematic, showing the connection of logic gates. | Logic Diagram
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| Delay from the time a signal is applied to the time when the output makes its change. | Propagation Delays
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| A technique of entering CPLD design information by using a CAD tool to draw a logic circuit as a schematic. | Schematic Entry
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