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Com 2
| Question | Answer |
|---|---|
| Which properties do all semiconductor memory cells share? | they exhibit two stable states which can be used to represent binary 1 and 0. they are capable of being written into to set the state. they are capable of being read to sense the state |
| One distinguishing characteristic of memory that is designated as _________ is that it is possible to both read data from the memory and to write new data into the memory easily and rapidly. | RAM |
| In a _________, binary values are stored using traditional flip-flop logic-gate configurations. | SRAM |
| A __________ contains a permanent pattern of data that cannot be changed, is nonvolatile, and cannot have new data written into it. | read-only memory (ROM) |
| With _________ the microchip is organized so that a section of memory cells are erased in a single action. | Flash memory |
| __________ can be caused by harsh environmental abuse, manufacturing defects, and wear. | Hard errors |
| _________ can be caused by power supply problems or alpha particles. | soft error |
| The _________ exchanges data with the processor synchronized to an external clock signal and running at the full speed of the processor/memory bus without imposing wait states. | SDRAM |
| With __________ the data transfer is synchronized to both the rising and falling edge of the clock, rather than just the rising edge. | DDR-DRAM |
| __________ increases the data transfer rate by increasing the operational frequency of the RAM chip and by increasing the prefetch buffer from 2 bits to 4 bits per chip. | DDR2 |
| ________ increases the prefetch buffer size to 8 bits. | DDR3 |
| Theoretically, a DDR module can transfer data at a clock rate in the range of __________ Mbps. | 200 to 400 |
| A DDR3 module transfers data at a clock rate of __________ Mbps. | 800 to 2133 |
| __________ is a good candidate to replace or supplement DRAM for main memory. | PCRA |
| In earlier computers the most common form of random-access storage for computer main memory employed an array of doughnut-shaped ferromagnetic loops referred to as __________. | Cores |
| RAM, ROM, PROM, EPROM, EEPROM, and flash memory are all examples of __________ memory types. | Read only Memory |
| A _________ RAM is made with cells that store data as charge on capacitors. | dynamic RAM |
| A __________ RAM is a digital device that uses the same logic elements used in the processor. | static RAM |
| Three common forms of read-mostly memory are: EPROM, EEPROM, and _________. | Flash memory |
| A __________ failure is a permanent physical defect so that the memory cell or cells affected cannot reliably store data but become stuck at 0 or 1 or switch erratically between 0 and 1. | hard |
| A __________ error is a random, nondestructive event that alters the contents of one or more memory cells without damaging the memory. | soft |
| The simplest of the error-correcting codes is the _________ code. | hamming codes |
| One of the most widely used forms of DRAM is the _________ DRAM. | synchronous |
| The two distinctive types of flash memory are designated as NOR and ______ | NAND |
| ___________ is a new type of Magnetic RAM, which features non-volatility, fast writing/reading speed, and high programming endurance and zero standby power. | Re-RAM |
| __________ works by creating resistance rather than directly storing charge | Re-RAM |
| 13. A new version of SDRAM, referred to as __________, can send data twice per clock cycle once on the rising edge of the clock pulse and once on the falling edge. | Double-data-rate SDRAM (DDR SDRAM) |
| The traditional __________ chip is constrained both by its internal architecture and by its interface to the processor’s memory bus. | DRAM |
| A typical DRAM pin configuration will include the __________ pin if necessary in order to have an even number of pins. | No connect (NC) |
| Greater ability to withstand shock and damage, improvement in the uniformity of the magnet film surface to increase disk reliability, and a significant reduction in overall surface defects to help reduce read-write errors, are all benefits of ___________. | The glass substrate |
| Adjacent tracks are separated by _________. | gaps |
| Data are transferred to and from the disk in __________. | sectors |
| In most contemporary systems fixed-length sectors are used, with _________ bytes being the nearly universal sector size. | 512 |
| Scanning information at the same rate by rotating the disk at a fixed speed is known as the _________. | constant angular velocity |
| The disadvantage of _________ is that the amount of data that can be stored on the long outer tracks is only the same as what can be stored on the short inner tracks. | CAV |
| A __________ disk is permanently mounted in the disk drive, such as the hard disk in a personal computer. | nonremovable |
| When the magnetizable coating is applied to both sides of the platter the disk is then referred to as _________. | double sided |
| The set of all the tracks in the same relative position on the platter is referred to as a _________. | cylinder |
| The sum of the seek time and the rotational delay equals the _________, which is the time it takes to get into position to read or write. | access time |
| __________ is the standardized scheme for multiple-disk database design. | RAID |
| RAID level ________ has the highest disk overhead of all RAID types. | 1 |
| A _________ is a high-definition video disk that can store 25 Gbytes on a single layer on a single side. | Blu-ray DVD |
| ________ is when the disk rotates more slowly for accesses near the outer edge than for those near the center. | Constant linear velocity (CLV) |
| The areas between pits are called _________. | land |
| A __________ is a circular platter constructed of nonmagnetic material, called the substrate, coated with a magnetizable material. | Disk |
| Data are recorded on and later retrieved from the disk via a conducting coil named the _________. | Head |
| Data is organized on the platter in a concentric set of rings called ________. | tracks |
| To increase density in a straightforward CAV system, modern hard disk systems use a technique known as __________, in which the surface is divided into a number of concentric zones. | Multiple zone recording |
| In a _________ disk there is one read-write head per track and all of the heads are mounted on a rigid arm that extends across all tracks. | Fixed-head |
| In a __________ disk there is only one read-write head mounted on an arm that can be extended or retracted to be able to be positioned above any track. | movable-head |
| The _________ disk is a small, flexible platter and the least expensive type of disk. | Floppy |
| __________ heads are used in sealed drive assemblies that are almost free of contaminants and the head is actually an aerodynamic foil that rests lightly on the platter’s surface when the disk is motionless. | Winchester |
| On a movable-head system, the time it takes to position the head at the track is known as__________. | Seek time |
| The time required to move the disk arm to the required track is the __________. | Seek time |
| The _________ strategy employs multiple disk drives and distributes data in such a way as to enable simultaneous access to data from multiple drives, thereby improving I/O performance and allowing easier incremental increases in capacity. | RAID |
| RAID levels 2 and 3 make use of a _________ access technique in which all member disks participate in the execution of every I/O request. | Parallel |
| A _________ drive is a memory device made with solid-state components that can be used as a replacement to a hard disk drive. | Solid state |
| The typical recording technique used in serial tapes is referred to as _________ recording. | serpentine |
| RAID levels 4 through 6 make use of an __________ access technique that allows separate I/O requests to be satisfied in parallel. | independent |
| The _________ contains logic for performing a communication function between the peripheral and the bus. | I/O module |
| The most common means of computer/user interaction is a __________. | Keyboard/monitor |
| The I/O function includes a _________ requirement to coordinate the flow of traffic between internal resources and external devices. | control and timing |
| An I/O module that takes on most of the detailed processing burden, presenting a high-level interface to the processor, is usually referred to as an _________. | I/O channel |
| An I/O module that is quite primitive and requires detailed control is usually referred to as an _________. | I/O controller |
| The _________ command causes the I/O module to take an item of data from the data bus and subsequently transmit that data item to the peripheral. | write |
| The ________ command is used to activate a peripheral and tell it what to do. | control |
| ________ is when the DMA module must force the processor to suspend operation temporarily. | Cycle stealing |
| The 8237 DMA is known as a _________ DMA controller. | fly-by |
| Interface to the processor and memory via the system bus or central switch and interface to one or more peripheral devices by tailored data links are two major functions of an _____________. | I/O module |
| We can broadly classify external devices into three categories: human readable, communication, and __________. | machine readable |
| The categories for the major functions or requirements for an I/O module are: control and timing, device communication, data buffering, error detection, and _________. | processor communication |
| In __________ mode the I/O module and main memory exchange data directly, without processor involvement. | direct memory access (DMA) |
| There are four types of I/O commands that an I/O module may receive when it is addressed by a processor: control, test, write, and _________. | read |
| When the processor, main memory, and I/O share a common bus, two modes of addressing are possible: memory mapped and ________. | isolated |
| The ________ is a single-chip, general-purpose I/O module designed for use with the Intel 80386 processor. | 82C55A |
| A ________ controls multiple high-speed devices and, at any one time, is dedicated to the transfer of data with one of those devices. | selector channel |
| The most recent, and fastest, peripheral connection technology to become available for general-purpose use is __________, developed by Intel with collaboration from Apple. | Thurderbolt |
| ________ enables servers, remote storage, and other network devices to be attached in a central fabric of switches and links, connecting up to 64,000 servers, storage systems, and networking devices. | InfiniBand |
| The __________ is a program that controls the execution of application programs and acts as an interface between applications and the computer hardware. | Operating system |
| Facilities and services provided by the OS that assist the programmer in creating programs are in the form of _________ programs that are not actually part of the OS but are accessible through the OS. | Utillity |
| The _________ defines the repertoire of machine language instructions that a computer can follow. | ISA |
| The _________ defines the system call interface to the operating system and the hardware resources and services available in a system through the user instruction set architecture. | ABI |
| The ________ gives a program access to the hardware resources and services available in a system through the user instruction set architecture supplemented with high-level language library calls. | API |
| A _________ system works only one program at a time. | Uniprogramming |
| A _________ is a special type of programming language used to provide instructions to the monitor. | job control language |
| The _________ scheduler determines which programs are admitted to the system for processing. | long term |
| The ________ scheduler is also known as the dispatcher. | short term |
| A _________ is an actual location in main memory. | physical address |
| ________ is when the processor spends most of its time swapping pages rather than executing instructions. | Thrashing |
| Virtual memory schemes make use of a special cache called a ________ for page table entries. | translation lookaside buffer (TLB) |
| With _________ the virtual address is the same as the physical address. | unsegmented unpaged memory |
| A _________ is a collection of memory regions. | domain |
| The OS maintains a __________ for each process that shows the frame location for each page of the process. | page table |
| The _________ is a program that manages the computer’s resources, provides services for programmers, and schedules the execution of other programs. | operating system |
| Three key interfaces in a typical computer system are: instruction set architecture, application programming interface, and ___________. | application binary interface (ABI) |
| The __________ , or nucleus, contains the most frequently used functions in the OS. | kernel |
| In an _________ system the user/programmer interacts directly with the computer, usually through a keyboard/display terminal to request the execution of a job or to perform a transaction. | interactive |
| A _________ system groups the user’s program with programs for other users and is submitted by a computer operator, with results being printed out for the user upon completion of the program. | batch |
| Early computer systems presented two main problems: setup time and _____. | scheduling |
| The portion of the monitor that must always be in main memory and available for execution is referred to as the __________. | resident monitor |
| The technique where memory is expanded to hold three, four, or more programs and switch among all of them is __________, (or multitasking). | multiprogramming |
| In a _________ system multiple users simultaneously access the system through terminals, with the OS interleaving the execution of each user program in a short burst or quantum of computation. | time-sharing |
| The five defined states for a process are: new, ready, waiting, halted, and ________. | running |
| Each process is represented in the OS by a ___________, which typically contains identifier, state, priority, program counter, memory pointers, context data, I/O status information, and accounting information. | process control block |
| Because a process executes only in main memory, that memory is referred to as __________. | real memory |
| __________ allows the programmer to view memory as consisting of multiple address spaces or segments. | segmentation |
| When the processor executes a process it automatically converts from logical to physical address by adding the current starting location of the process, called its __________, to each logical address. | base address |
| _________ paging means that each page of a process is brought in only when it is needed. | demand |
Created by:
Catst
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