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Burst EDO (BEDO) a refined version of EDO memory that significantly improved access time over EDO. BEDO was not widely used because Intel chose not to support it
CAS Latency (CL) A method of measuring access timing to memory, which is the number of clock cycles required to write or read a column of data off a memory module. CAS stand for Column Access Strobe
C-RIMM (Continuity RIMM) a placeholder RIMM module that provides continuity so that every RIMM slot is filled.
DDR2 A version of SDRAM that is faster then DDR and uses less power.
DDR3 A version of SDRAM that is faster then DDR2 memory and that can use triple channels.
Direct Rambus DRAM A memory technology by Rambus and Intel that uses a narrow network type system bus.
Double Data Rate SDRAM A type of memory technology used on DIMMs that runs at twice the speed of the system clock. Also called DDR SDRAM, SDRAM II and DDR
DDR SDRAM A type of memory technology used on DIMMs that runs at twice the speed of the system clock. Also called DDR SDRAM, SDRAM II and DDR
double-sided A DIMM feature whereby memory chips are installed on both sides of a DIMM
dual channels a motherboard feature that improves memory performance by providing two 64-bit channels between memory and the chipset. DDR, DDR2 and DDR3 DIMMs can use dual channels.
dual ranked double-sided DIMMs that provide two 64-bit banks. Dual ranked DIMMs do not perform as well as single-ranked DIMMs.
dynamic RAM (DRAM) DRAM is the most common type of system memory, it requires refreshing every few milliseconds
ECC (error-correcting code) a chipset feature on a motherboard that checks the integrity of data stored on DIMMs or RIMMs and can correct single-bit errors in a byte. More advanced ECC schemas can detect, but not correct, double bit errors in a byte.
EDO (extended data out) a type of outdated RAM that was faster then conventional RAM because it eliminated the delay before it issued the next memory address.
FPM (fast page memory) an outdated memory mode used before the introduction of EDO memory. FPM improved earlier memory types by sending the row address just once for many accesses to memory near that row.
Created by: shanemc10
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