click below
click below
Normal Size Small Size show me how
1.4.3
| Question | Answer |
|---|---|
| Logic gates | physical devices that implement boolean functions, it is useful to minimise the number of logic gates used to build the circuits used in computers |
| Logic/circuit diagram | logic gates combined |
| George Boole | Identified that all logical solutions could be represented using just true/false |
| Truth tables | show all the possible combinations of inputs and the resulting output - Inputs use letters from the start of the alphabet - Outputs use letters from the end |
| Equivalence | the same (≡) |
| Negation (logic gate) | NOT operator Reverses the input Notation: ¬ means NOT Q could be replaced with ¬A |
| Conjunction (logic gate) | AND operator Outputs true if both inputs are true Notation: ∧ means AND Q could be replaced by A∧B |
| Disjunction (logic gate) | OR operator Outputs true if either inputs are true Notation: ∨ means OR Q could be replaced by A∨B |
| Exclusive disjunction (logic gate) | XOR operator Outputs true is just one of the inputs is true Notation: means XOR Q could be replaced by A B |
| Karnaugh maps | A method of simplifying boolean expressions, minimising logic gates used |
| Karnaugh maps rules: headings | In 3+4 input grids, the binary numbers can only change 1 digit to the next |
| Karnaugh maps rules: boxes | -Squares or rectangles -No diagonal blocks -Only contain 1s -Large as possible -Overlapping and wrap-around blocks are ok -Aim for the smallest possible number of groups -Can only be a power of 2 in size (e.g. 1, 2, 4, or 8 no. of 1s in a box) |
| Karnaugh maps rules: method | -List inputs as column/row headings -List outputs per input set -Convert each block to a expression -Use a box+variable (eventually cover all) -Heading digits match, keep variable -1=include 0=exclude -Join kept variables by∧ -Join expressions by V |
| Karnaugh maps examples: 2 input | Whenever B is 1, the result is 1, so the expression can be simplified to ‘B’ |
| Karnaugh maps examples: 3 input | Gives (A^B)V(¬A^¬B)v(¬B^¬C) It could be AB, AC, BC. The pairings don't matter |
| Karnaugh maps examples: 4 input | Gives (¬A^B)v(¬C)v(A^¬D) |
| Simplify statements in Boolean Algebra | There are rules on how to do this - de Morgan's laws - Distribution - Association - Commutation - Double negation |
| De Morgan’s laws | If a boolean expression containing an AND or OR operator is negated it is equal to an expression involving the negated variables, where the AND operator is replaced by the OR operator and vice versa: - ¬(X^Y) = ¬Xv¬Y - ¬(XvY) = ¬X^¬Y |
| Distribution | The AND of a variable with the OR of two others is equal to the OR of the AND of the first variable and the second, and the AND of the first variable and the third and vice versa - X^(YvZ) = (X^Y)v(X^Z) - Xv(Y^Z) = (XvY)^(XvZ) |
| Association | When an expression involves only AND or only OR operators, they can be regrouped in any order by using brackets - X^(Y^Z) = (X^Y)^Z - = X^Y^Z |
| Commutation | The order two variables appear either side of an operator doesn’t matter - X^Y = Y^X - XvY = YvX |
| Double Negation | Double negative equals positive, somewhat like how ‘don’t not’ means ‘do’ - ¬(¬X) = X |
| D type flip flop (logic circuits) | They have two inputs: - Data - Clock And has two outputs: - The data (1 or 0) - The inverse if the data (o or 1) Whenever the clock rises, Q changes value to become what D is at that moment, and NOT Q changes to be NOT Q |
| Half-adder (logic circuits) | A logic circuit with two inputs that can output the sum and carry for the two input digits |
| Full adder (logic circuits) | Allows the carry from a previous calculation to be brought forward to the next calculation |