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MPU SA!111111

QuestionAnswer
is a figure of merit of a logic circuit which is based on the product of propagation delay and the power dissipation at a specified frequency. Speed Power Product
They are generally used as data storage and are directly connected to the data bus. They are generally used as data storage and are directly connected to the data bus. General Purpose Registers (GPR) A and B
Status Register It is used to hold the status of the microprocessor after performing an operation. It is sometimes referred to as Flag Register
use for error detection Parity
It contains the address of the next instruction to be performed by the MPU Program Counter
This register points to the data or instruction on the top of the stack. This is where data or instruction temporarily not in use is stored. It uses________ algorithm Lasit in First Out (LIFO)
is used as an aid in addressing data in tables stored in memory. It can be incremented or decremented Index Register
is used to send the control signals flowing in the control bus to enable the different parts of the microprocessor unit Control Logic
a high speed bipolar transistor logic family which uses an overdriven BJT differential amplifier with single ended input. Emitter Coupled Logic
In designing the instruction set of a microprocessor, it is important to consider _________ instructions or the redundancy of instructions. orthogonal
The addressing mode where the operand is stored at a memory location whose address is explicitly mentioned in the instruction. Direct Addressing
The addressing mode in which the operand is specified directly in the instruction. Immediate Addressing
The addressing mode in which the operand is specified directly in the instruction. Microcontroller
Integrated Circuits _______ approximately every two years Doubles
First practical IC was developed by Robert Noyce
a unidirectional bus that is used to locate a memory location or an I/O device connected to the system. Address Bus
It is a group of wires or lines that are used to transfer the addresses of Memory or I/O devices. It is unidirectional. Address Bus
is a bus buffering technique which is characterized by a multiple source and single destination transfer of signals. Type 2
allows an output port to assume a high impedance state in addition to the 1 and 0 logic levels, effectively removing the output from the circuit. This allows multiple circuits to share the same output line or lines. Using tri-state buffers
the outputs share a common bus line but no more than one buffer is active at any given time Using tri-state buffers
The delay caused by the time required for a signal to propagate through a digital circuit is called Propagation Delay
Note that ___ is the logic threshold where output is assumed to switch states. 50%
the least significant byte is to be stored in lower address. Little Endian
Placing data to the stack invokes a PUSH
Factors Affecting the Performance of a Microprocessor Wordlength, Addressable memory locations
This is the maximum noise voltage added or subtracted to the input signal of a digital circuit that does not cause any undesirable change in the circuit output. Noise Margin
This is the difference between the worst-case voltage at the output and the minimum or maximum voltage to be recognized at the input Noise Margin
This specifies the number of standard loads or maximum number of inputs that can be connected to the output of a gate without degrading its normal operation Fan out
It is calculated from the amount of current available in the output of the gate and the amount of current needed in each input of a gate Fan out
Created by: user-1929129
 

 



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