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MPU SA1
PAPASAAAAAAAA
| Question | Answer |
|---|---|
| is just an integrated circuit. On its own, without a surrounding circuit and applied voltages, it is quite useless. | Microprocessor |
| the central processing of a computer which includes the ALU, register unit, and control unit, all integrated in a single IC. | Microprocessor |
| complete computing system with memory, microprocessor, and I/O unit. | Microcomputer |
| a single chip microcomputer consisting of microprocessor, memory, and I/O unit. | Microcontroller |
| The law stating that the number of transistors on an integrated circuit doubles approximately every two years. | Moore's Law |
| The person who formulated Moore’s Law. | Gordon Moore |
| a digital circuit which uses resistors as the input network and BJT as switching device. | Resistor-Transistor Logic (RTL) |
| the logic gating function is performed by a diode network and the amplifying action is performed by transistors. | Diode-Transistor Logic (DTL)– |
| both the logic gating function and the amplifying function are performed by transistors. | Transistor-Transistor Logic (TTL |
| a high speed bipolar transistor logic family which uses an overdriven BJT differential amplifier with single-ended input. | Emitter-Coupled Logic (ECL) |
| uses p-channelmetal oxide semiconductor FET to implement logic gates. | PMOS Logic |
| uses n-channelmetal oxide semiconductor FET to implement logic gates. | NMOS Logic |
| complementary MOSFETs designed using symmetrical pairs of p-and n-channel | CMOS Logic |
| First IC was developed by | Jack Kilby |
| Intel was founded by | Robert Noyce and Gordon Moore |
| First practical IC was developed by | Robert Noyce |
| The first microprocessor developed by Intel in partnership with Busicom. | Intel 4004 |
| 8-bit microprocessor 64 kb of memory 500 KIPS | Intel 8080 |
| 8-bit (1st generation) 16 kb of memory 48 instructions | Intel 8008 |
| Developed by MOSTECH 8-bit microprocessor 16-bit address | 6502 |
| 1 MB of memory 1st 16 bit MPU (2.5 MIPS with 2000 instructions) Capable of multiplication and division | Intel 8086, 8088 |
| 8-bit (2nd generation) microprocessor 769, 230 Ips 246 instructions machine-code compatible with Z80 | Intel 8085 |
| a physical group of signal lines that has a related function within a microprocessor system | System Bus |
| a set of lines that connect two or more partsof an element | Internal Bus |
| a set of lines that connect two or more elements | External Bus |
| The type of system bus that carries the memory address or the address of an I/O device. | Address Bus |
| a unidirectional bus that is used to locate a memory location or an I/O device connected to the system. | Address Bus |
| The bidirectional system bus responsible for transmitting data between the CPU and memory or peripherals | Data Bus |
| a bidirectional bus that carries data back and forth to a specified location with basis to the address location provided by the address bus. | Data Bus |
| The system bus responsible for carrying control signals within a microprocessor system. | Control Bus |
| collection of individual control signals used by the microprocessor to send its generated control signals to any element of the computer system. | Control Bus |
| refer to the various methods or techniques that ensure the validity of a logic level when signals are carried out on the bus. | Bus Buffering Techniques |
| a bus buffering technique which is characterized by a single source and multiple destination transfer of signals | Type 1 |
| a bus buffering technique which is characterized by a multiple source and single destination transfer of signals. | Type 2 |
| a Type 2 design which can possibly damage the devices involved because an excessive current flows from the logic 1 output to the logic 0 output. | Bus Contention |
| allows an output port to assume a high impedance statein addition to the 1 and 0 logic levels, effectively removing the output from the circuit. This allows multiple circuits to share the same output line or lines. | Using Tri-state Buffers |
| the outputs share a common bus line but no more than one buffer is active at any given time. | Using Tri-state Buffers |
| the outputs share a common bus line but no more than one input is reflected at the output at any given time due to the presence of select lines, S1 and S0. | Using Multiplexer |
| bus buffering technique which is characterized by a multiple source and multiple destination transfer of signals. | Type 3 |
| This is the maximum noise voltage added or subtracted to the input signal of a digital circuit that does not cause any undesirable change in the circuit output. | Noise Margin or Noise Immunity |
| This is the difference between the worst-case voltage at the output and the minimum or maximum voltage to be recognized at the input. | Noise Margin |
| These are terms used in the field of digital electronics to refer to the direction of direct current flow between TTL gates. | Current Sinking and Sourcing |
| They refer to the flow of conventional current from the positive, which is the sourcing end, to the ground, which is the sinking end. | Current Sinking and Sourcing |
| This specifies the number of standard loads or maximum number of inputs that can be connected to the output of a gate without degrading its normal operation | Fan Out |
| It is calculated from the amount of current available in the outputof the gate and the amount of current needed in each input of a gate. | Fan Out |
| When gate inputs change, outputs do not change instantaneously. This delay is known as? | Propagation Delay |
| signal delay time between the input and output when the output changes from high to low level | Tphl |
| signal delay time between the input and output when the output changes from low to high level | Tplh |
| It is calculated from the supply voltage VCCand the current ICCthat is drawn by the circuit. | Power Dissipation |
| It is used to sendinformation from one component into anotherand has the job of establishing communication with the external unit. | Bus Unit |
| Bidirectional bus that carries data back and forth to a specified location with basis to the address location provided by the address bus. | Data Bus |
| It is a group of wires or lines that are used to transfer the addresses of Memory or I/O devices. It is unidirectional. The number of bits of address bus determines the maximum size of memorywhich the processor can access. | Address Bus |
| are composed of group of flip flops, each one shares a common clock and is capable of storing one bit of information or modify stored binary word. | Register Set |
| They are generally used as data storage and are directly connected to the data bus. | General Purpose Registers |
| The register that works very closely with the ALU. All results of the processes performed by the ALU is stored in this register. | Accumulator |
| It is used to hold the status of the microprocessor after performing an operation. It is sometimes referred | Status Register |
| It is used to hold the instruction code or operation code (opcode). The outputs of this register are the inputs to the instruction decoder. | Instruction Register |
| It contains the address of the next instruction to be performed by the MPU. It automatically increments as soon as it is finished with the memory location. | Program Counter |
| This is where the data to be stored to or retrieved from the memory are placed. This register also loads the fetched instruction from the memory going to instruction register. | Memory Data Register |
| This is where the addresses of data and instructions can be located. | Memory Address Register (MAR) |
| This register points to the data or instruction on the top of the stack. This is where data or instruction temporarily not in use is stored. It uses a Last-In-First-Out (LIFO) algorithm. | Stack Pointer |
| Placing data to the stack invokes a | PUSH |
| retrieving data from the stack invokes a | POP |
| the least significant byte is to be stored in lower address. | Little Endian |
| the most significant byte is to be stored in lower address. | Big Endian |
| is used as an aid in addressing data in tables stored in memory. It can be incremented or decremented. | Index Register |
| It contains the microprocessor’s data processing major logic and performs arithmetic and logic operations. It is composed of adders/subtracters, comparators, and different combinational circuits. | Arithmetic Logic Unit (ALU) |
| directs the operation of the microprocessor. It tells the computer’s memory, ALU, and I/O devices how to respond to program’s instructions. | Control Unit |
| The instruction decoder is the circuit responsible for synthesizing and decoding the instructions fed or received by the microprocessor. | Instruction Decoder |
| The timing circuit is used to synchronize the operation of the different parts of the microprocessor. | Timing Circuit |
| is used to send the control signals flowing in the control bus to enable the different parts of the microprocessor unit. | Control Logic |
| A bus buffering issue that occurs when multiple sources try to drive a single destination simultaneously. | Bus Contention |
| The register that contains the instruction currently being processed by the microprocessor. | Instruction Register |
| The register that holds temporary data before being processed by the ALU. | Temporary Register |
| The register that stores the address of a memory location where data will be retrieved or stored. | Memory Address Register |
| The microprocessor component responsible for decoding and executing instructions. | Control Unit |
| The circuit responsible for synchronizing the different operations in a microprocessor. | Clock |
| The addressing mode in which the operand is specified directly in the instruction. | Immediate addressing mode |
| The addressing mode where a register holds the address of the operand instead of the operand itself. | Register indirect addressing mode |
| The addressing mode where the operand is stored at a memory location whose address is explicitly mentioned in the instruction. | Direct addressing mode |
| The maximum number of input gates that a logic gate can drive without performance degradation. | Fan-out |
| The delay caused by the time required for a signal to propagate through a digital circuit is called | Propagation Delay |
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