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SWIITCHING FIN
PAPASAAA AKOOO!!!! IRERECYCLED TOOO
| Question | Answer |
|---|---|
| Consist of logic gates whose ouputs at any time are determined directly from the present combination of inputs without regard to previous inputs | Combinational Logic Circuits |
| The circuit does not use any memory. The previous state of input does not have effect on the present state of the circuit. | Combinational Logic Circuits |
| The speed of the addition operation depends on the time required for the carries to propogate | Look Ahead Carry Generation |
| The principles of __________ solves this problem by calculating the carry in advance based on the inputs | Look Ahead Carry Genaration |
| The maximum possible sum of a BCD adder | 19 |
| Most basic memory elements | NOR |
| Converts binary information from n input lines to a maximum of 2^n unique output lines | Decoder |
| Selecst binary information from one many input lines and directs it to a single output line. | Multiplexer |
| 2^n input lines, n selections lines whose bit combinations determine which input is selected. | Multiplexer |
| "data selector" | Multiplexer |
| A circuit that receivees information on a single line and transmits this information to one of 2^n possible output lines | Demultiplexer |
| Consist of a combination circuit to which memory elements are connected to form a feedback path | Sequential Logic circuits |
| Receieves binary information from external inputs together with the present state of the memory elements to determine the binary value at the output terminals | Sequential Logic circuits |
| Storage elements that operates with signal levels rather than signal transistions are referred to as ________ while thos controlled by a clock transition are _________ | latches and flip flops |
| _________ are said to be level sensitive devices while _________ are edge sensitive devices | Latches and Flip Flops |
| The two types of storage elements | Latches and flip flops |
| A device with two stable states | Flip FLops |
| It can maintain a binary state indefinitely until directed by an input signal to switch states | Flip Flops |
| It remains in of these states until triggered into the other | Flip Flops |
| A system whose behavior can be defines from the knowledge of its signals at discrete instants of time | Synchronous sequential logic circuit |
| Achieved by a timing device called a clock generator., which provides a clock signal have the form of a periodic train of clock pulses | Synchronization |
| Depends upon the input signals at any instant of time and the order in which the inputs change | Asynchronous Sequential Logic Circuit |
| output of the flip-flop responds during the high (or low) level of the clock signal | Level Clocking |
| The flip flop produces output only on the rising (or falling) edge of the clock signal | Edge Triggering |
| Two external inputs that initiate the condition or state of the flip-flop | Preset and Clear |
| Priority Inputs | Preset and Clear |
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